Decreasing the Power-Clock Resonant Signal Central Voltage as a Mean for Power Reduction in Integrated Power and Clock Distribution Networks

Esmaeili, Seyed; Fawzi, Abeer

Decreasing the Power-Clock Resonant Signal Central Voltage as a Mean for Power Reduction in Integrated Power and Clock Distribution Networks

Authors

Esmaeili, Seyed

Fawzi, Abeer

Issue Date

2021-10-11

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Peer Reviewed
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Esmaeili, S. E., & Imdoukh, A. (2021). Decreasing the power-clock resonant signal central voltage as a mean for power reduction in integrated power and clock distribution networks. Indian Journal of Science and Technology, 14(33), 2671-2683. https://doi.org/10.17485/IJST/v14i33.1820

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Indian Journal of Science and Technology

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https://dspace.auk.edu.kw/handle/11675/9637

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College of Engineering and Applied Sciences

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Decreasing the Power-Clock Resonant Signal Central Voltage as a Mean for Power Reduction in Integrated Power and Clock Distribution Networks

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