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dc.contributor.authorAblak, A.
dc.contributor.authorDamaj, Issam
dc.date.accessioned2017-10-02T07:39:07Z
dc.date.available2017-10-02T07:39:07Z
dc.date.issuedAugust 31st�� September 2nd, 2016
dc.identifier.urihttp://ieeexplore.ieee.org/document/7723553/
dc.identifier.urihttp://hdl.handle.net/11675/2998
dc.description.abstractFunctional programming languages, such as Haskell, enable simple, concise, and correct-by-construction hardware development. HTCC compiles a subset of Haskell to Handel-C language with hardware output. Moreover, HTCC generates VHDL, Verilog, EDIF, and SystemC programs. The design of HTCC compiler includes lexical, syntax and semantic analyzers. HTCC automates a transformational derivation methodology to rapidly produce hardware that maps onto Field Programmable Gate Arrays (FPGAs). HTCC is generated using ANTLR compiler-compiler tool and supports an effective integrated development environment. This paper presents the design rationale and the implementation of HTCC. Several sample generations of first-class and higher-order functions are presented. In-addition, a compilation case-study is presented for the XTEA cipher. The investigation comprises a thorough evaluation and performance analysis. The targeted FPGAs include Cyclone II, Stratix IV, and Virtex-6 from Altera and Xilinx.
dc.publisherThe 19th�EUROMICRO Conference on Digital System Design, Limassol, Cyprus
dc.titleHTCC: Haskell to Handel-C Compiler
dc.typeConference Paper
dc.article.pages192-199.


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